h3cx
c67316dd90
Derive units are now available in the core and has their relevant input values routed and outputs are looped back into the core router Fixed the dlpak manifest which had no signal descriptors
63 lines
1.6 KiB
Python
63 lines
1.6 KiB
Python
import logging
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from pathlib import Path
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from time import sleep
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from uuid import UUID, uuid4
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from rich.logging import RichHandler
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from dynalab_core import Core
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from dynalab_core.config import CoreConfig
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from dynalab_core.protocols.packets.handshake import SignalDescriptor
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logging.basicConfig(
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level=logging.DEBUG,
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format="%(name)s %(message)s",
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datefmt="%H:%M:%S",
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handlers=[RichHandler(rich_tracebacks=True, show_path=False)],
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force=True,
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)
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log = logging.getLogger(__name__)
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processing_str = Path(
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"/home/hector/projects/Exergie/dynalab-core/test/manual/process.py"
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).read_text(encoding="utf-8")
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signal_id_1: UUID = UUID("3f32cea3-d872-4c16-a0a2-54b57171aeb2")
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signal_id_2: UUID = UUID("6578ac37-99d1-410c-b3f7-d049339919b2")
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config = CoreConfig(port=8765)
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log.info("Configured manual core on %s", config.bind_str())
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dl_core = Core(config)
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dl_core.start()
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dl_core.start_recording()
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for i in range(2):
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dl_core.wait(1)
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values = dl_core.get_all_live_values()
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log.debug(f"Core values: {values}")
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unit_id = dl_core.bind_derive_unit(
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processing_str,
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[
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SignalDescriptor(
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id=signal_id_1, name="Dummy signal 1", type="number", timeout_ms=5000
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),
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SignalDescriptor(
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id=signal_id_2, name="Dummy signal 2", type="number", timeout_ms=5000
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),
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],
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SignalDescriptor(id=uuid4(), name="Dummy sum", type="number", timeout_ms=5000),
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)
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try:
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while True:
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dl_core.wait(1)
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values = dl_core.get_all_live_values()
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log.debug(f"Core values: {values}")
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except KeyboardInterrupt:
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log.info("Received keyboard interrupt")
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dl_core.stop_recording()
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dl_core.stop()
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