NeoECU-Hardware/Architecture/diagrams/README.md

Architecture diagram sources

The architecture Markdown embeds these 22 SVG figures. Matching PNG previews are provided for viewers that do not support SVG. Diagrams describe the working architecture; component qualification and schematic-release requirements remain in the parent documents.

Figures

Topic	Figures
Power	Sources, protected branches
Analogue acquisition	Passive input, thermistor, ratiometric acquisition
Timing inputs	Crank/cam interface
Deadman	Contacts and diagnostics, permit gates, output gates
Ignition	Power, commands, current flag, grounding
Injection	Power, command, status, grounding
Generic outputs	5 V logic, low-side power, supplies and SPI, command bias
Optional DAC	Output provision

Editing and regeneration

• The 12 block figures have editable .drawio sources. Open them in draw.io. build_blocks.py recreates their baseline layout and block-connections.json. Running it overwrites manual layout edits, so update the generator when those edits should be reproducible, or export the edited .drawio directly.
• The 10 circuit/logic figures are generated by build_circuits.py, with a separate *.topology.json connection manifest for each figure. Change the relevant component/net definitions and layout together in that script; rerunning it overwrites the generated topology and images. JSON is a review manifest, not an independently interpreted rendering input.
• Reference designators introduced by these drawings are documentation labels, not KiCad assignments. Named continuation ports are electrically identical only when their names match within the documented domain.

Run from this directory using the configured schematic environment:

python build_blocks.py
~/.venvs/codex-schematics/bin/python export_blocks.py
~/.venvs/codex-schematics/bin/python build_circuits.py

export_blocks.py requires the installed draw.io desktop renderer; restricted Electron sandboxes may require an authorized external execution. It exports only .drawio inputs, keeps editable sources, checks for native SVG text, and creates PNG previews. The circuit builder uses Schemdraw and CairoSVG. Inspect changed figures at their intended embedded size after rebuilding.

Validate each circuit manifest with the installed topology validator:

~/.venvs/codex-schematics/bin/python \
  ~/.codex/skills/electronics-schematic-rendering/scripts/validate_topology.py \
  analog-input.topology.json

Source clarifications in this redraw

• The former power-tree branch labelled +5V_AUX after 3.3 V filtering is now +3V3_ANA, matching the dedicated rail description. +5V_AUX remains a protected branch of +5V_MAIN.
• The passive ADC drawing now shows C_HOLD as a shunt capacitor after the small isolation resistor specified in the prose. It does not add a separate connector-side R_PROT. Exact values remain unspecified.
• The Hall-input drawing separates sensor supply, sensor return and signal; the original ASCII alignment could suggest an unintended join. The pull-up, divider and parallel filter follow the existing prose.
• The deadman equations are unchanged. Contact observations, permission gates and output gates occupy separate figures; shared net names connect them.
• VBG_LOCAL_KELVIN labels the documented local ignition reference at the IGN_PGND joining point. LOCAL_GND in the sink-command figure denotes the TLE9104SH local ground reference. Neither denotes a new remote ground path.
• The obsolete reference to a missing figure in DIGITAL_INPUTS.md was removed. That module remains described by its existing component-level prose.

Protection blocks whose devices or ratings remain unselected are deliberately functional. Supply-loss behavior, real pin mappings, ratings and physical fault responses still require the validation specified in the module documents.