520 lines
16 KiB
C
520 lines
16 KiB
C
/* USER CODE BEGIN Header */
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// Copyright (C) 2026 Hector van der Aa <hector@h3cx.dev>
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// Copyright (C) 2026 Pierre Barbier <pierrebarbier741@gmail.com>
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// Copyright (C) 2026 Association Exergie <association.exergie@gmail.com>
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// SPDX-License-Identifier: GPL-3.0-or-later
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "FreeRTOS.h"
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#include "cmsis_os2.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "global_state.h"
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#include "ring_buffer.h"
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#ifdef DEBUG
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#include "SEGGER_RTT.h"
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#endif
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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typedef StaticTask_t osStaticThreadDef_t;
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/* USER CODE BEGIN PTD */
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/* USER CODE END PTD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* DUAL_CORE_BOOT_SYNC_SEQUENCE: Define for dual core boot synchronization */
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/* demonstration code based on hardware semaphore */
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/* This define is present in both CM7/CM4 projects */
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/* To comment when developping/debugging on a single core */
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// #define DUAL_CORE_BOOT_SYNC_SEQUENCE
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#if defined(DUAL_CORE_BOOT_SYNC_SEQUENCE)
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#ifndef HSEM_ID_0
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#define HSEM_ID_0 (0U) /* HW semaphore 0*/
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#endif
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#endif /* DUAL_CORE_BOOT_SYNC_SEQUENCE */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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TIM_HandleTypeDef htim2;
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/* Definitions for defaultTask */
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osThreadId_t defaultTaskHandle;
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const osThreadAttr_t defaultTask_attributes = {
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.name = "defaultTask",
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.stack_size = 128 * 4,
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.priority = (osPriority_t)osPriorityNormal,
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};
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/* Definitions for crankTask */
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osThreadId_t crankTaskHandle;
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uint32_t crankTaskBuffer[128];
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osStaticThreadDef_t crankTaskControlBlock;
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const osThreadAttr_t crankTask_attributes = {
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.name = "crankTask",
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.cb_mem = &crankTaskControlBlock,
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.cb_size = sizeof(crankTaskControlBlock),
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.stack_mem = &crankTaskBuffer[0],
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.stack_size = sizeof(crankTaskBuffer),
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.priority = (osPriority_t)osPriorityRealtime7,
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};
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/* Definitions for camTask */
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osThreadId_t camTaskHandle;
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uint32_t camTaskBuffer[128];
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osStaticThreadDef_t camTaskControlBlock;
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const osThreadAttr_t camTask_attributes = {
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.name = "camTask",
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.cb_mem = &camTaskControlBlock,
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.cb_size = sizeof(camTaskControlBlock),
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.stack_mem = &camTaskBuffer[0],
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.stack_size = sizeof(camTaskBuffer),
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.priority = (osPriority_t)osPriorityRealtime7,
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};
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/* USER CODE BEGIN PV */
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static volatile global_state_t state_g = {0};
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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static void MPU_Config(void);
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static void MX_GPIO_Init(void);
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static void MX_TIM2_Init(void);
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void StartDefaultTask(void *argument);
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void crankHandler(void *argument);
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void camHandler(void *argument);
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) {
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if (htim->Instance == TIM2) {
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switch (htim->Channel) {
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// HAL_TIM_ACTIVE_CHANNEL_2 is the channel used for cam interupts
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case HAL_TIM_ACTIVE_CHANNEL_2:
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ringBufferPush(&state_g.cam_RB,
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HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_2));
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osThreadFlagsSet(camTaskHandle, 0x01);
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break;
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// HAL_TIM_ACTIVE_CHANNEL_1 is the channel used for crank interupts
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case HAL_TIM_ACTIVE_CHANNEL_1:
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ringBufferPush(&state_g.crank_RB,
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HAL_TIM_ReadCapturedValue(htim, TIM_CHANNEL_1));
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osThreadFlagsSet(crankTaskHandle, 0x01);
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break;
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default:
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break;
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}
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}
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}
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void) {
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* USER CODE BEGIN Boot_Mode_Sequence_0 */
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#if defined(DUAL_CORE_BOOT_SYNC_SEQUENCE)
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int32_t timeout;
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#endif /* DUAL_CORE_BOOT_SYNC_SEQUENCE */
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/* USER CODE END Boot_Mode_Sequence_0 */
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/* MPU Configuration--------------------------------------------------------*/
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MPU_Config();
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/* USER CODE BEGIN Boot_Mode_Sequence_1 */
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#if defined(DUAL_CORE_BOOT_SYNC_SEQUENCE)
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/* Wait until CPU2 boots and enters in stop mode or timeout*/
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timeout = 0xFFFF;
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while ((__HAL_RCC_GET_FLAG(RCC_FLAG_D2CKRDY) != RESET) && (timeout-- > 0))
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;
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if (timeout < 0) {
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Error_Handler();
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}
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#endif /* DUAL_CORE_BOOT_SYNC_SEQUENCE */
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/* USER CODE END Boot_Mode_Sequence_1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick.
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*/
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HAL_Init();
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/* USER CODE BEGIN Init */
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state_g.sync = SYNC_NOT_OK;
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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/* USER CODE BEGIN Boot_Mode_Sequence_2 */
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#if defined(DUAL_CORE_BOOT_SYNC_SEQUENCE)
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/* When system initialization is finished, Cortex-M7 will release Cortex-M4 by
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means of HSEM notification */
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/*HW semaphore Clock enable*/
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__HAL_RCC_HSEM_CLK_ENABLE();
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/*Take HSEM */
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HAL_HSEM_FastTake(HSEM_ID_0);
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/*Release HSEM in order to notify the CPU2(CM4)*/
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HAL_HSEM_Release(HSEM_ID_0, 0);
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/* wait until CPU2 wakes up from stop mode */
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timeout = 0xFFFF;
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while ((__HAL_RCC_GET_FLAG(RCC_FLAG_D2CKRDY) == RESET) && (timeout-- > 0))
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;
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if (timeout < 0) {
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Error_Handler();
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}
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#endif /* DUAL_CORE_BOOT_SYNC_SEQUENCE */
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/* USER CODE END Boot_Mode_Sequence_2 */
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_TIM2_Init();
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/* USER CODE BEGIN 2 */
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#ifdef DEBUG
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void SEGGER_RTT_Init(void);
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SEGGER_RTT_ConfigUpBuffer(0, NULL, NULL, 0,
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SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL);
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#endif
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/* USER CODE END 2 */
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/* Init scheduler */
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osKernelInitialize();
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/* USER CODE BEGIN RTOS_MUTEX */
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/* add mutexes, ... */
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/* USER CODE END RTOS_MUTEX */
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/* USER CODE BEGIN RTOS_SEMAPHORES */
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/* add semaphores, ... */
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/* USER CODE END RTOS_SEMAPHORES */
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/* USER CODE BEGIN RTOS_TIMERS */
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/* start timers, add new ones, ... */
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/* USER CODE END RTOS_TIMERS */
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/* USER CODE BEGIN RTOS_QUEUES */
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/* add queues, ... */
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/* USER CODE END RTOS_QUEUES */
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/* Create the thread(s) */
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/* creation of defaultTask */
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defaultTaskHandle =
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osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
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/* creation of crankTask */
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crankTaskHandle = osThreadNew(crankHandler, NULL, &crankTask_attributes);
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/* creation of camTask */
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camTaskHandle = osThreadNew(camHandler, NULL, &camTask_attributes);
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/* USER CODE BEGIN RTOS_THREADS */
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/* add threads, ... */
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/* USER CODE END RTOS_THREADS */
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/* USER CODE BEGIN RTOS_EVENTS */
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/* add events, ... */
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/* USER CODE END RTOS_EVENTS */
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/* Start scheduler */
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osKernelStart();
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/* We should never get here as control is now taken by the scheduler */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1) {
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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}
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/* USER CODE END 3 */
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}
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void) {
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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/** Supply configuration update enable
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*/
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
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while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {
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}
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 2;
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RCC_OscInitStruct.PLL.PLLN = 100;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
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RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
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RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
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Error_Handler();
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}
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}
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/**
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* @brief TIM2 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_TIM2_Init(void) {
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/* USER CODE BEGIN TIM2_Init 0 */
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/* USER CODE END TIM2_Init 0 */
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TIM_ClockConfigTypeDef sClockSourceConfig = {0};
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TIM_MasterConfigTypeDef sMasterConfig = {0};
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TIM_IC_InitTypeDef sConfigIC = {0};
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/* USER CODE BEGIN TIM2_Init 1 */
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/* USER CODE END TIM2_Init 1 */
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htim2.Instance = TIM2;
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htim2.Init.Prescaler = 0;
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htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
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htim2.Init.Period = 4294967295;
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htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV4;
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htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
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if (HAL_TIM_Base_Init(&htim2) != HAL_OK) {
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Error_Handler();
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}
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sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
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if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) {
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Error_Handler();
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}
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if (HAL_TIM_IC_Init(&htim2) != HAL_OK) {
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Error_Handler();
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}
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sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
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sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) {
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Error_Handler();
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}
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sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
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sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
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sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
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sConfigIC.ICFilter = 0;
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if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) {
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Error_Handler();
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}
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sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
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if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) {
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Error_Handler();
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}
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/* USER CODE BEGIN TIM2_Init 2 */
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HAL_TIM_IC_Start_IT(&htim2, TIM_CHANNEL_1);
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HAL_TIM_IC_Start_IT(&htim2, TIM_CHANNEL_2);
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/* USER CODE END TIM2_Init 2 */
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}
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/**
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* @brief GPIO Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_GPIO_Init(void) {
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* USER CODE BEGIN MX_GPIO_Init_1 */
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/* USER CODE END MX_GPIO_Init_1 */
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOI_CLK_ENABLE();
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/*Configure GPIO pin Output Level */
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HAL_GPIO_WritePin(LED_RED_GPIO_Port, LED_RED_Pin, GPIO_PIN_SET);
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/*Configure GPIO pin : LED_RED_Pin */
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GPIO_InitStruct.Pin = LED_RED_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(LED_RED_GPIO_Port, &GPIO_InitStruct);
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/* USER CODE BEGIN MX_GPIO_Init_2 */
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/* USER CODE END MX_GPIO_Init_2 */
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}
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/* USER CODE BEGIN 4 */
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/* USER CODE END 4 */
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/* USER CODE BEGIN Header_StartDefaultTask */
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/**
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* @brief Function implementing the defaultTask thread.
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* @param argument: Not used
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* @retval None
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*/
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/* USER CODE END Header_StartDefaultTask */
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void StartDefaultTask(void *argument) {
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/* USER CODE BEGIN 5 */
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/* Infinite loop */
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for (;;) {
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osDelay(1000);
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}
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/* USER CODE END 5 */
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}
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/* USER CODE BEGIN Header_crankHandler */
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/**
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* @brief Function implementing the crankTask thread.
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* @param argument: Not used
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* @retval None
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*/
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/* USER CODE END Header_crankHandler */
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void crankHandler(void *argument) {
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/* USER CODE BEGIN crankHandler */
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/* Infinite loop */
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for (;;) {
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osThreadFlagsWait(0x01, osFlagsWaitAny, osWaitForever);
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#ifdef DEBUG
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SEGGER_RTT_printf(0, "Crank pulse detected at: %lu\n\r",
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ringBufferRead(&state_g.crank_RB, 0));
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#endif /* ifdef DEBUG */
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if (state_g.sync == SYNC_OK) {
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// TODO complete algorithm for scheduling spark
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}
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}
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/* USER CODE END crankHandler */
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}
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/* USER CODE BEGIN Header_camHandler */
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/**
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* @brief Function implementing the camTask thread.
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* @param argument: Not used
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* @retval None
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*/
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/* USER CODE END Header_camHandler */
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void camHandler(void *argument) {
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/* USER CODE BEGIN camHandler */
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/* Infinite loop */
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for (;;) {
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osThreadFlagsWait(0x01, osFlagsWaitAny, osWaitForever);
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#ifdef DEBUG
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SEGGER_RTT_printf(0, "Cam pulse detected at: %lu\n\r",
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ringBufferRead(&state_g.cam_RB, 0));
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#endif /* ifdef DEBUG */
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if (state_g.sync == SYNC_OK) {
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// TODO complete algorithm for scheduling spark
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}
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}
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/* USER CODE END camHandler */
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}
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/* MPU Configuration */
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void MPU_Config(void) {
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MPU_Region_InitTypeDef MPU_InitStruct = {0};
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/* Disables the MPU */
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HAL_MPU_Disable();
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/** Initializes and configures the Region and the memory to be protected
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*/
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER0;
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MPU_InitStruct.BaseAddress = 0x0;
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MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
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MPU_InitStruct.SubRegionDisable = 0x87;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Enables the MPU */
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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/**
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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|
void Error_Handler(void) {
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
|
/* User can add his own implementation to report the HAL error return state */
|
|
__disable_irq();
|
|
while (1) {
|
|
}
|
|
/* USER CODE END Error_Handler_Debug */
|
|
}
|
|
#ifdef USE_FULL_ASSERT
|
|
/**
|
|
* @brief Reports the name of the source file and the source line number
|
|
* where the assert_param error has occurred.
|
|
* @param file: pointer to the source file name
|
|
* @param line: assert_param error line source number
|
|
* @retval None
|
|
*/
|
|
void assert_failed(uint8_t *file, uint32_t line) {
|
|
/* USER CODE BEGIN 6 */
|
|
/* User can add his own implementation to report the file name and line
|
|
number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file,
|
|
line) */
|
|
/* USER CODE END 6 */
|
|
}
|
|
#endif /* USE_FULL_ASSERT */
|