h3cx
7502b354dc
This is a first implementation of a "full" timing system, with proper handling for cases wher the ignition charge time overlaps with the compression pulse, the spark has a more complex state machine system with the option to defer charge from the intake pulse to the compression pulse, and further defferal of the spark release schedule to the ISR that triggers when the output compare triggers for the charge Preliminary error counters have been put in place, they still require handling error conditions that would force a soft shutdown on the ignition IC. Alongside this the code still needs to be verified so that all non critical errors (ie missed charge schedules) reset the state machine and increment a global spark miss counter to avoid having these errors breaking the state machine as they can easily be recovered from Cases where the coil would already be charging and an error occurs require as stated above a full recovery procedure with soft shutdown of the ignition IC and a clean cycle of the state machine to ensure a full recovery
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
// Copyright (C) 2026 Pierre Barbier <pierrebarbier741@gmail.com>
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// Copyright (C) 2026 Association Exergie <association.exergie@gmail.com>
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// SPDX-License-Identifier: GPL-3.0-or-later
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#pragma once
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#include <ring_buffer.h>
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#include <stdbool.h>
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#include <stdint.h>
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#define MAX_CAM_MISS 2
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#define SPARK_ADVANCE 30
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#define SPARK_CHARGE_TIME 3000
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#define INJECTION_PHASE 0
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typedef enum { SYNC_OK = 0, SYNC_PENDING = 1, SYNC_NOT_OK = 2 } sync_state_t;
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typedef enum {
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CYCLE_COMBUSTION = 0,
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CYCLE_EXHAUST = 1,
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CYCLE_INTAKE = 2,
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CYCLE_COMPRESSION = 3,
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CYCLE_UNKNOWN = 4
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} crank_state_t;
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typedef enum { CAM_IDLE = 0, CAM_TRIGD = 1 } cam_state_t;
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typedef enum {
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SPARK_IDLE = 0,
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SPARK_PENDING_CHARGE = 1,
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SPARK_CHARGING = 2,
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SPARK_PENDING_RELEASE = 3,
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SPARK_NONE = 4
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} spark_state_t;
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typedef struct {
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uint32_t overspeed_error_ctr;
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uint32_t defer_charge_error_ctr;
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uint32_t revised_charge_error_ctr;
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uint32_t task_release_error_ctr;
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uint32_t state_error_ctr;
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uint32_t isr_release_error_ctr;
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} spark_errors_t;
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typedef struct {
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crank_state_t crank_state;
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cam_state_t cam_state;
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uint8_t cam_miss_ctr;
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sync_state_t sync_state;
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ring_buffer_t crank_RB;
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ring_buffer_t cam_RB;
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spark_state_t next_spark_state;
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spark_state_t current_spark_state;
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bool charge_defer;
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bool spark_defer;
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uint32_t t_defer_spark;
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spark_errors_t spark_errors;
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} global_state_t;
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