Initial sync implementation

Implemented system sync with crank and cam state and simple error
handling
This commit is contained in:
2026-06-03 10:56:28 +02:00
parent 21f0b5a3ea
commit 42e64b673c
6 changed files with 115 additions and 35 deletions

View File

@@ -249,8 +249,10 @@ SYS.userName=SYS_M7
TIM2.Channel-Input_Capture1_from_TI1=TIM_CHANNEL_1
TIM2.Channel-Input_Capture2_from_TI2=TIM_CHANNEL_2
TIM2.ClockDivision=TIM_CLOCKDIVISION_DIV4
TIM2.ICFilter_CH1=10
TIM2.ICFilter_CH2=10
TIM2.ICPolarity_CH1=TIM_INPUTCHANNELPOLARITY_FALLING
TIM2.IPParameters=ClockDivision,Prescaler,Channel-Input_Capture1_from_TI1,ICPolarity_CH1,Channel-Input_Capture2_from_TI2
TIM2.IPParameters=ClockDivision,Prescaler,Channel-Input_Capture1_from_TI1,ICPolarity_CH1,Channel-Input_Capture2_from_TI2,ICFilter_CH2,ICFilter_CH1
TIM2.Prescaler=0
VP_FREERTOS_M7_VS_CMSIS_V2.Mode=CMSIS_V2
VP_FREERTOS_M7_VS_CMSIS_V2.Signal=FREERTOS_M7_VS_CMSIS_V2